Semiconductor wafers, such as silicon semiconductor wafers, are employed as substrates in the fabrication of a wide variety of integrated circuit semiconductor devices. To make the wafers, bulk silicon material is first melted in a quartz crucible in a high temperature crystal growing furnace. A piece of single crystal silicon, called a seed crystal, is attached to the end of a rod and then caused to contact the melted silicon material in the crucible. The seed is then slowly lifted while the silicon melt is slowly rotated relative thereto. As the seed is lifted, an elongated cylinder of single crystalline silicon is formed. This process is called crystal growing. After a rod of sufficient length of single crystalline silicon is grown, the rod is removed from the crystal growing furnace and placed in a wafer slicing machine.
In the wafer slicing machine wafers having a thickness of approximately 600 microns are cut from the rod. These wafers are subsequently used as substrate material in the fabrication of integrated circuit semiconductor devices.
The quality of the semiconductor wafers plays an important role in both integrated circuit device fabrication yields and processing difficulties. Among the factors relating to the quality of the substrate material, one has to do with the number of bulk impurities in the substrate material. Depending on their number, character and location in the wafer, some bulk impurities cause serious defects in the wafer. These bulk impurities come from a number of sources. For example, the bulk silicon material used in forming the single crystal rod described above contains impurities. As the rod is grown additional impurities enter the rod due to reactions between the melted silicon material and the quartz crucible in which the material is melted. These bulk impurities, if permitted to migrate toward the active surface of a wafer during device fabrication, cause defects in the wafer which adversely affect the operation of devices made from the wafer.
One measure of wafer quality is the density of shallow etch pits exposed by preferential etching of the active or polished surface of a wafer following initial oxidation. The etch pits are caused by strain producing centers which weaken the atomic binding energy of a crystal lattice. These surface defects result from impurities in the bulk of the wafer diffusing or gettering toward the surface of the wafer during high temperature processing of the wafer. It is generally understood that the bulk impurities tend to concentrate in the vicinity of defects in the crystal lattice wherein the atomic binding energy is lowest. When the defects occur on or near the surface of the substrate material, the defects are found to have their greatest dilatorious affect on subsequent device fabrication yields and operation.
Heretofore, processes which have been employed for removing or reducing the impurity levels related to strain centers from the active or polished side of silicon wafers have included backside damage processes to getter the contaminants to the backside of the silicon wafer and processes including exposure of the wafer to a phosphorous heat cycle. It has been found, however, that the use of both of these processes have not been entirely successful. This has been due to the fact that high temperatures used during subsequent wafer processing causes the impurities collected on the back surface of the semiconductor wafer to redistribute through the bulk of the wafer and reappear in unacceptably high numbers on the polished surface of the wafer. The number of such defects has been found, using conventional preferential etching to be as high as 500,000 defects per square centimeter. This high number of defects seriously affects device yields.